From cee712105850ac3385cd0091a923438167433f9f Mon Sep 17 00:00:00 2001
From: TSR Berry <20988865+TSRBerry@users.noreply.github.com>
Date: Sat, 8 Apr 2023 01:22:00 +0200
Subject: Move solution and projects to src

---
 ARMeilleure/Decoders/OpCode32SimdLong.cs | 30 ------------------------------
 1 file changed, 30 deletions(-)
 delete mode 100644 ARMeilleure/Decoders/OpCode32SimdLong.cs

(limited to 'ARMeilleure/Decoders/OpCode32SimdLong.cs')

diff --git a/ARMeilleure/Decoders/OpCode32SimdLong.cs b/ARMeilleure/Decoders/OpCode32SimdLong.cs
deleted file mode 100644
index 8d64d673..00000000
--- a/ARMeilleure/Decoders/OpCode32SimdLong.cs
+++ /dev/null
@@ -1,30 +0,0 @@
-namespace ARMeilleure.Decoders
-{
-    class OpCode32SimdLong : OpCode32SimdBase
-    {
-        public bool U { get; }
-
-        public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode, false);
-        public static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode, true);
-
-        public OpCode32SimdLong(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
-        {
-            int imm3h = (opCode >> 19) & 0x7;
-
-            // The value must be a power of 2, otherwise it is the encoding of another instruction.
-            switch (imm3h)
-            {
-                case 1: Size = 0; break;
-                case 2: Size = 1; break;
-                case 4: Size = 2; break;
-            }
-
-            U = ((opCode >> (isThumb ? 28 : 24)) & 0x1) != 0;
-
-            RegisterSize = RegisterSize.Simd64;
-
-            Vd = ((opCode >> 18) & 0x10) | ((opCode >> 12) & 0xf);
-            Vm = ((opCode >> 1) & 0x10) | ((opCode >> 0) & 0xf);
-        }
-    }
-}
-- 
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