From f5235fff29e797ed76022bbd51e4e64577c83457 Mon Sep 17 00:00:00 2001
From: merry <git@mary.rs>
Date: Thu, 25 Aug 2022 11:12:13 +0100
Subject: ARMeilleure: Hardware accelerate SHA256 (#3585)

* ARMeilleure/HardwareCapabilities: Add Sha

* ARMeilleure/Intrinsic: Add X86Sha256Rnds2

* ARmeilleure: Hardware accelerate SHA256H/SHA256H2

* ARMeilleure/Intrinsic: Add X86Sha256Msg1, X86Sha256Msg2

* ARMeilleure/Intrinsic: Add X86Palignr

* ARMeilleure: Hardware accelerate SHA256SU0, SHA256SU1

* PTC: Bump InternalVersion
---
 ARMeilleure/CodeGen/X86/X86Instruction.cs | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'ARMeilleure/CodeGen/X86/X86Instruction.cs')

diff --git a/ARMeilleure/CodeGen/X86/X86Instruction.cs b/ARMeilleure/CodeGen/X86/X86Instruction.cs
index ed5b50c5..37926a16 100644
--- a/ARMeilleure/CodeGen/X86/X86Instruction.cs
+++ b/ARMeilleure/CodeGen/X86/X86Instruction.cs
@@ -98,6 +98,7 @@ namespace ARMeilleure.CodeGen.X86
         Paddd,
         Paddq,
         Paddw,
+        Palignr,
         Pand,
         Pandn,
         Pavgb,
@@ -180,6 +181,9 @@ namespace ARMeilleure.CodeGen.X86
         Rsqrtss,
         Sar,
         Setcc,
+        Sha256Msg1,
+        Sha256Msg2,
+        Sha256Rnds2,
         Shl,
         Shr,
         Shufpd,
-- 
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