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path: root/Ryujinx.Tests/Cpu/CpuTest.cs
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2018-04-29Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110)LDj3SNuD
* Update ILGeneratorEx.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuTest.cs * Update Pseudocode.cs * Update Instructions.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdArithmetic.cs
2018-04-18Add 151 complete tests for 71 base instructions of types: Alu; AluImm; ↵LDj3SNuD
AluRs; AluRx; Bfm; CcmpImm; CcmpReg; Csel; Mov; Mul. (#80) * Add files via upload * Update Ryujinx.Tests.csproj
2018-03-12Allow more than one process, free resources on process dispose, implement ↵gdkchan
SvcExitThread
2018-03-10Allow to enable/disable memory checks even on release mode through the flag, ↵gdkchan
return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks
2018-03-09Disable memory checks by default, even on debug, move ram memory allocation ↵gdkchan
inside the CPU, since the size if fixed anyway, better heap region size
2018-03-05Add Frintx_S, ASRV test, update ADCS, use Assert.Multiple and indent (#44)MS-DOS1999
* add 'ADC 32bit and Overflow' test * Add WZR/WSP tests * fix ADC and ADDS * add ADCS test * add SBCS test * indent my code and delete comment * '/' <- i hate you x) * remove spacebar char * remove false tab * add frintx_S test * update frintx_S test * add ASRV test * fix new line * fix PR * fix indent
2018-02-27Change SvcGetInfo 5 to return actual heap size, remove AMemoryAlloc since it ↵gdkchan
is no longer needed with direct memory access, move some memory management logic out of AMemoryMgr, change default virtual filesystem path to AppData
2018-02-25Added initial support for function names from symbol table on the cpu with ↵gdkchan
tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
2018-02-24Update ADC test, add WZR/WSP, ADCS, SBCS test (#37)MS-DOS1999
* add 'ADC 32bit and Overflow' test * Add WZR/WSP tests * fix ADC and ADDS * add ADCS test * add SBCS test * indent my code and delete comment * '/' <- i hate you x) * remove spacebar char * remove false tab
2018-02-23Add flags parameters in singleOpcode function, and add ADC Test (#36)MS-DOS1999
* Add flags parameters in singleOpcode function, and add ADC Test * Update CpuTestAlu.cs * Update CpuTestAlu.cs * Update CpuTestAlu.cs * Update CpuTestAlu.cs
2018-02-23Review of cpu tests and creation of a class for mixed cpu tests. (#35)LDj3SNuD
* Update CpuTest.cs * Update CpuTestAlu.cs * Update CpuTestScalar.cs * Update CpuTestSimdMove.cs * Create CpuTestMisc.cs * Update CpuTest.cs * Update CpuTestScalar.cs * Update CpuTest.cs * Update CpuTestAlu.cs * Update CpuTestMisc.cs * Update CpuTestScalar.cs
2018-02-18Rename ARegisters to AThreadStategdkchan
2018-02-15Add some tests (#18)Merry
* Add tests * Add some simple Alu instruction tests * travis: Run tests * CpuTest: Add TearDown
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