| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-09-08 | Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. (#407) | LDj3SNuD | |
| * Update AOpCodeTable.cs * Update AInstEmitSimdShift.cs * Update ASoftFallback.cs * Update AOpCodeSimdShImm.cs * Update ABitUtils.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Create CpuTestSimdShImm.cs * Create CpuTestSimdRegElem.cs * Address PR feedback. * Nit. * Nit. | |||
| 2018-07-14 | Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225) | gdkchan | |
| * Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions * Address PR feedback * Address PR feedback * Remove another useless temp var * nit: Alignment * Replace Context.CurrOp.GetBitsCount() with Op.GetBitsCount() * Fix encodings and move flag bit test out of the loop | |||
| 2018-03-14 | CPU fix for the cases using a Mask with shift = 0 | gdkchan | |
| 2018-03-14 | Add CRC32 instruction and SLI (vector) | gdkchan | |
| 2018-03-10 | Fix EmitScalarUnaryOpF and add SSRA (vector) | gdkchan | |
| 2018-03-09 | Add SHLL instruction | gdkchan | |
| 2018-02-20 | Split main project into core,graphics and chocolarm4 subproject (#29) | emmauss | |
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index : Ryujinx | |
| A backup of the Ryujinx master git branch. |
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